[Gesammelte Informationen zur Hardware von CST - HD2]

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[MCP]
Beiträge: 109
Registriert: Sa 28. Mai 2016, 15:42
Wohnort: LE
Box: Zee², Trinity DUO , ZGEMMA H7C

[Gesammelte Informationen zur Hardware von CST - HD2]

Beitrag von [MCP] »

Was ist eigentlich in der LINK / TRINITY DUO verbaut? (Stand: 20.10.2021)

Kronos v2 ist da für mich der Projektname, unter dem das halt bei CST in der Entwicklung gelaufen ist.

Der verbaute "Hauptprozessor" SOC stammt vom Hersteller Entropic ==>> EN75x1. Ich behaupte x = 3.

Damit ist ein EN7531 verbaut: Integrated High Definition IP Set-top Box SoC with Advanced 3D Graphics Capabilities

https://web.archive.org/web/20140504160 ... box/en7531

Die Firma Entropic wurde leider aufgekauft.

Bei MARUSYS => PRISMCUBE JET ist der EN7588 verbaut gewesen und dafür gab es Kodi und noch was von openATV.

Ich suche nach dem Verbleib von http://git.prismcube-community.net.it/git/

Vielleicht könnte man die Ansteuerung vom en7588 mit zurück verwenden (Treiber für Kernel).

Nach Decompilierung von en75x1.dtb kommt für mich folgendes zu sehen:
[+] Spoiler


<stdout>: Warning (unit_address_vs_reg): /memory: node has a reg or ranges property, but no unit name
<stdout>: Warning (unit_address_vs_reg): /cache-controller: node has a reg or ranges property, but no unit name
<stdout>: Warning (alias_paths): /aliases: aliases property name must include only lowercase and '-'
<stdout>: Warning (alias_paths): /aliases: aliases property name must include only lowercase and '-'
/dts-v1/;

/ {
#address-cells = <0x01>;
#size-cells = <0x01>;
compatible = "cst,kronos-hd2\0entr,kronos";
interrupt-parent = <0x01>;
model = "CoolStream HD2 Kronos STB";

chosen {
entr,ARM926-start = <0x1400000>;
entr,ARM926-size = <0x800000>;
entr,A9_ARM926-start = <0x1c00000>;
entr,A9_ARM926-size = <0x100000>;
entr,BIS-start = <0x1d00000>;
entr,BIS-size = <0x40000>;
entr,ARM926_TM-start = <0x1e00000>;
entr,ARM926_TM-size = <0x80000>;
entr,MBVP_stdi-start = <0x1e80000>;
entr,MBVP_stdi-size = <0x90000>;
entr,ADSP-start = <0x2000000>;
entr,ADSP-size = <0x848000>;
entr,VDSP-start = <0x2a00000>;
entr,VDSP-size = <0x180000>;
entr,MALONE-start = <0x2c00000>;
entr,MALONE-size = <0x7700000>;
entr,VRAMHD-start = <0xa300000>;
entr,VRAMHD-size = <0x1052000>;
entr,VRAMSD-start = "\v5 ";
entr,VRAMSD-size = <0x3b8100>;
entr,MBVPHD-start = <0xb70b000>;
entr,MBVPHD-size = <0x17ce000>;
entr,MBVPSD-start = <0xced9000>;
entr,MBVPSD-size = <0x523000>;
entr,KALCSSGEN-start = <0xd3fc000>;
entr,KALCSSGEN-size = <0x32a8000>;
entr,KALCSSCON-start = <0x106a4000>;
entr,KALCSSCON-size = <0x1490000>;
bootargs = "noinitrd console=ttyS0,115200n8 mtdparts=e0632000.flash_sfc:256k@0k(uldr),512k@256k(u-boot),128k@768k(env),128k@896k(spare),-(kernel);e0631000.flash_nand:256m@0k(root0),32m@256m(var),-(root1) root=mtd:root0 rw rootfstype=jffs2";
};

aliases {
nx_2017 = "/flash_nand@e0631000";
nx_sfc = "/flash_sfc@e0632000";
ethernet0 = "/ethernet@e062c000";
};

memory {
device_type = "memory";
reg = <0x00 0x20000000>;
};

interrupt-controller@e0100100 {
compatible = "arm,cortex-a9-gic";
#interrupt-cells = <0x03>;
interrupt-controller;
reg = <0xe0101000 0x1000 0xe0100100 0x1000>;
linux,phandle = <0x01>;
phandle = <0x01>;
};

cache-controller {
compatible = "arm,pl310-cache";
reg = <0xe0102000 0x1000>;
interrupts = <0x00 0x80 0x04>;
arm,data-latency = <0x01 0x01 0x01>;
arm,tag-latency = <0x01 0x01 0x01>;
arm,filter-ranges = <0x00 0x80000000>;
cache-unified;
cache-level = <0x02>;
linux,phandle = <0x02>;
phandle = <0x02>;
};

watchdog@10060000 {
compatible = "entr,stb-wdt";
reg = <0x10060000 0x100>;
interrupts = <0x00 0x0b 0x04>;
status = "disabled";
};

globaltimer@e0100200 {
compatible = "arm,cortex-a9-global-timer";
reg = <0xe0100200 0x100>;
interrupts = <0x01 0x0b 0x104>;
status = "okay";
};

localtimer@e0100600 {
compatible = "arm,cortex-a9-twd-timer";
reg = <0xe0100600 0x20>;
interrupts = <0x01 0x0d 0x304>;
status = "okay";
};

gcs@e0636000 {
compatible = "entr,stb-gcs";
reg = <0xe0636000 0x1000>;
status = "disabled";
};

acpdma@e062a000 {
compatible = "entr,stb-acpdma";
reg = <0xe062a000 0x1000>;
interrupts = <0x00 0x53 0x04>;
status = "okay";
};

flash_nor@e0630000 {
compatible = "entr,stb-nor";
reg = <0xe0630000 0x1000>;
status = "disabled";
};

flash_nand@e0631000 {
compatible = "entr,stb-nand";
reg = <0xe0631000 0x1000>;
interrupts = <0x00 0x6d 0x04>;
status = "okay";
};

flash_sfc@e0632000 {
compatible = "entr,stb-sfc";
reg = <0xe0632000 0x1000 0xe0634000 0x1000>;
interrupts = <0x00 0x6e 0x04>;
status = "okay";
};

sdhci@e066f000 {
compatible = "entr,stb-sdhci";
reg = <0xe066f000 0x1000>;
interrupts = <0x00 0x7c 0x04>;
nslots = <0x01>;
status = "disabled";
};

serial@e06b2000 {
compatible = "entr,stb-uart";
reg = <0xe06b2000 0x1000>;
interrupts = <0x00 0x0f 0x04>;
status = "okay";
};

serial@e06b3000 {
compatible = "entr,stb-uart";
reg = <0xe06b3000 0x1000>;
interrupts = <0x00 0x10 0x04>;
status = "disable";
};

serial@e06b4000 {
compatible = "entr,stb-uart";
reg = <0xe06b4000 0x1000>;
interrupts = <0x00 0x11 0x04>;
status = "disable";
};

i2c@e068f000 {
#address-cells = <0x01>;
#size-cells = <0x00>;
compatible = "entr,stb-i2c";
reg = <0xe068f000 0x1000>;
interrupts = <0x00 0x19 0x04>;
status = "disabled";
};

i2c@e068d000 {
#address-cells = <0x01>;
#size-cells = <0x00>;
compatible = "entr,stb-i2c";
reg = <0xe068d000 0x1000>;
interrupts = <0x00 0x17 0x04>;
status = "disabled";
};

i2c@e068e000 {
#address-cells = <0x01>;
#size-cells = <0x00>;
compatible = "entr,stb-i2c";
reg = <0xe068e000 0x1000>;
interrupts = <0x00 0x18 0x04>;
status = "disabled";
};

spi@e06b0000 {
compatible = "entr,stb-spi";
reg = <0xe06b0000 0x1000>;
interrupts = <0x00 0x12 0x04>;
#address-cells = <0x01>;
#size-cells = <0x00>;
status = "disabled";
};

usb@e066c000 {
compatible = "entr,stb-usb-ehci";
reg = <0xe066c000 0x1000>;
interrupts = <0x00 0x3d 0x04>;
status = "okay";
};

usb@e066d000 {
compatible = "entr,stb-usb-ehci";
reg = <0xe066d000 0x1000>;
interrupts = <0x00 0x3e 0x04>;
status = "okay";
};

gcsdma@e0634000 {
compatible = "entr,gcs-dmac";
reg = <0xe0634000 0x1000>;
interrupts = <0x00 0x4c 0x04>;
status = "okay";
};

gpio@e06ab000 {
compatible = "entr,stb-gpio0";
reg = <0xe06ab000 0x1000>;
interrupts = <0x00 0x00 0x04>;
status = "okay";
gpio-controller;
#gpio-cells = <0x01>;
interrupt-controller;
#interrupt-cells = <0x02>;
};

gpio@e0669000 {
compatible = "entr,stb-gpio1";
reg = <0xe0669000 0x1000>;
interrupts = <0x00 0x46 0x04>;
status = "okay";
gpio-controller;
#gpio-cells = <0x01>;
interrupt-controller;
#interrupt-cells = <0x02>;
};

sata@e0638000 {
compatible = "entr,stb-ahci";
reg = <0xe0638000 0x1000>;
interrupts = <0x00 0x07 0x04>;
status = "okay";
};

cpus {
#address-cells = <0x01>;
#size-cells = <0x00>;

cpu@0 {
device_type = "cpu";
compatible = "arm,cortex-a9";
reg = <0x00>;
next-level-cache = <0x02>;
};
};

ethernet@e062c000 {
compatible = "snps,dwmac\0entr,gmac";
mac-address = [00 00 00 00 00 00];
reg = <0xe067c000 0x4000>;
interrupts = <0x00 0x08 0x04 0x00 0x09 0x04>;
interrupt-names = "macirq\0eth_wake_irq";
phy-mode = "mii";
status = "okay";
};
};
Das sieht für mich danach aus, als wenn im inneren mindestens noch ein ARM926EJ-S (ARMv5TE) vorhanden ist. Auch ein Cortex-M3 macht wahrscheinlich
das Power-Management.

Beim Compilieren von Code, wird für die Ziel-CPU ARMv7-A + Tuning Cortex-A9 + Floating Point Unit VFPv3 als Ziel vorgegeben.

NEON SIMD Extension ist nicht vorhanden.
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